Texas Instruments TMS320C6A816 Series Technical Reference Manual page 71

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7-16. Transmit DMA Enable Clear Register (I2C_DMATXENABLE_CLR) Field Descriptions
7-17. Receive DMA Wakeup Register (I2C_DMARXWAKE_EN) Field Descriptions
7-18. Transmit DMA Wakeup Register (I2C_DMATXWAKE_EN) Field Descriptions
7-19. System Status Register (I2C_SYSS) Field Descriptions
7-20. Buffer Configuration Register (I2C_BUF) Field Descriptions
7-21. Data Counter Register (I2C_CNT) Field Descriptions
7-22. Data Access Register (I2C_DATA) Field Descriptions
7-23. I2C Configuration Register (I2C_CON) Field Descriptions
7-24. I2C Own Address Register (I2C_OA) Field Descriptions
7-25. I2C Slave Address Register (I2C_SA) Field Descriptions
7-26. I2C Clock Prescaler Register (I2C_PSC) Field Descriptions
7-27. I2C SCL Low Time Register (I2C_SCLL) Field Descriptions
7-28. I2C SCL High Time Register (I2C_SCLH) Field Descriptions
7-29. System Test Register (I2C_SYSTEST) Field Descriptions
7-30. I2C Buffer Status Register (I2C_BUFSTAT) Field Descriptions
7-31. Own Address 1 (OA1) (I2C_OA1) Field Descriptions
7-32. I2C Own Address 2 Register (I2C_OA2) Field Descriptions
7-33. I2C Own Address 3 Register (I2C_OA3) Field Descriptions
7-34. Active Own Address Register (I2C_ACTOA) Field Descriptions
7-35. I2C Clock Blocking Enable Register (I2C_SBLOCK) Field Descriptions
8-1. Interrupt Controller Resets
8-2. Interrupt Controller Interrupt Inputs and Outputs
8-3. Interrupt Controller (INTC) Registers
8-4. INTCPS_REVISION Register Field Descriptions
8-5. INTCPS_SYSCONFIG Register Field Descriptions
8-6. INTCPS_SYSSTATUS Register Field Descriptions
8-7. INTCPS_SIR_IRQ Register Field Descriptions
8-8. INTCPS_SIR_FIQ Register Field Descriptions
8-9. INTCPS_CONTROL Register Field Descriptions
8-10. INTCPS_PROTECTION Register Field Descriptions
8-11. INTCPS_IDLE Register Field Descriptions
8-12. INTCPS_IRQ_PRIORITY Register Field Descriptions
8-13. INTCPS_FIQ_PRIORITY Register Field Descriptions
8-14. INTCPS_THRESHOLD Register Field Descriptions
8-15. INTCPS_ITRn Register Field Descriptions
8-16. INTCPS_MIRn Register Field Descriptions
8-17. INTCPS_MIR_CLEARn Register Field Descriptions
8-18. INTCPS_MIR_SETn Register Field Descriptions
8-19. INTCPS_ISR_SETn Register Field Descriptions
8-20. INTCPS_ISR_CLEARn Register Field Descriptions
8-21. INTCPS_PENDING_IRQn Register Field Descriptions
8-22. INTCPS_PENDING_FIQn Register Field Descriptions
8-23. INTCPS_ILRm Register Field Descriptions
9-1. SD/SDIO Controller Pins and Descriptions
9-2. Response Type Summary
9-3. Local Power Management Features
9-4. Clock Activity Settings
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9-5. Events
9-6. Memory Size, BLEN, and Buffer Relationship
SPRUGX9 - 15 April 2011
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© 2011, Texas Instruments Incorporated
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