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Introduction
The EMAC and MDIO interrupts are combined within the control module, so only the control module
interrupt needs to be monitored by the application software or device driver. The EMAC control module
combines the EMAC and MDIO interrupts and generates 4 separate interrupts to the ARM through the
ARM interrupt controller. See
module.
3.1.5 Industry Standard(s) Compliance Statement
The EMAC peripheral conforms to the IEEE 802.3 standard, describing the Carrier Sense Multiple Access
with Collision Detection (CSMA/CD) Access Method and Physical Layer specifications. The IEEE 802.3
standard has also been adopted by ISO/IEC and re-designated as ISO/IEC 8802-3:2000(E).
In difference from this standard, the EMAC peripheral does not use the Transmit Coding Error signal
MTXER. Instead of driving the error pin when an underflow condition occurs on a transmitted frame, the
EMAC intentionally generates an incorrect checksum by inverting the frame CRC, so that the transmitted
frame is detected as an error by the network.
3.1.6 List of Terms
Broadcast MAC Address— A special Ethernet MAC address used to send data to all Ethernet devices
on the local network. The broadcast address is FFh-FFh-FFh-FFh-FFh-FFh. The LSB of the first
byte is odd, qualifying it as a group address; however, its value is reserved for broadcast. It is
classified separately by the EMAC.
Descriptor (Packet Buffer Descriptor)— A small memory structure that describes a larger block of
memory in terms of size, location, and state. Descriptors are used by the EMAC and application to
describe the memory buffers that hold Ethernet data.
Device — In this document, device refers to the processor.
Ethernet MAC Address (MAC Address)— A unique 6-byte address that identifies an Ethernet device on
the network. In an Ethernet packet, a MAC address is used twice, first to identify the packet's
destination, and second to identify the packet's sender or source. An Ethernet MAC address is
normally specified in hexadecimal, using dashes to separate bytes. For example,
08h-00h-28h-32h-17h-42h.
The first three bytes normally designate the manufacturer of the device. However, when the first
byte of the address is odd (LSB is 1), the address is a group address (broadcast or multicast). The
second bit specifies whether the address is globally or locally administrated (not considered in this
document).
Ethernet Packet (Packet)— An Ethernet packet is the collection of bytes that represents the data portion
of a single Ethernet frame on the wire.
Full Duplex— Full-duplex operation allows simultaneous communication between a pair of stations using
point-to-point media (dedicated channel). Full-duplex operation does not require that transmitters
defer, nor do they monitor or react to receive activity, as there is no contention for a shared medium
in this mode. Full-duplex mode can only be used when all of the following are true:
•
The physical medium is capable of supporting simultaneous transmission and reception without
interference.
•
There are exactly two stations connected with a full duplex point-to-point link. As there is no
contention for use of a shared medium, the multiple access (that is, CSMA/CD) algorithms are
unnecessary.
•
Both stations on the LAN are capable of, and have been configured to use, full-duplex
operation.
The most common configuration envisioned for full-duplex operation consists of a central bridge
(also known as a switch) with a dedicated LAN connecting each bridge port to a single device.
Full-duplex operation constitutes a proper subset of the MAC functionality required for half-duplex
operation.
408
EMAC/MDIO Module
Preliminary
Section 10.2.11.1
for details of interrupt multiplex logic of the EMAC control
© 2011, Texas Instruments Incorporated
www.ti.com
SPRUGX9 – 15 April 2011
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