Ethernet Mac Id1 Low Register (Mac_Id1_Lo); Ethernet Mac Id1 High Register (Mac_Id1_Hi); Ethernet Mac Id1 Low Register (Mac_Id1_Lo) Field Descriptions; Ethernet Mac Id1 High Register (Mac_Id1_Hi) Field Descriptions - Texas Instruments TMS320C6A816 Series Technical Reference Manual

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1.16.1.3.13 Ethernet MAC ID1 Low Register (MAC_ID1_LO)

The MAC_ID1_LO register contains the lower 2 bytes of the 48-bit ID for MAC1.
The Ethernet MAC ID1 Low Register (MAC_ID1_LO) is shown in
Table 1-210.
31
Reserved
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 1-210. Ethernet MAC ID1 Low Register (MAC_ID1_LO) Field Descriptions
Bit Field
31-16 Reserved
15-8 MACADDR[7:0]
7-0 MACADDR[15:8]

1.16.1.3.14 Ethernet MAC ID1 High Register (MAC_ID1_HI)

The MAC_ID1_HI register contains the upper 4 bytes of the 48-bit ID for MAC1.
The Ethernet MAC ID1 High Register (MAC_ID1_HI) is shown in
Table 1-211.
31
MACADDR[23:16]
R-eFuse
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 1-211. Ethernet MAC ID1 High Register (MAC_ID1_HI) Field Descriptions
Bit Field
31-24 MACADDR[23:16]
23-16 MACADDR[31:24]
15-8 MACADDR[39:32]
7-0 MACADDR[47:40]
SPRUGX9 – 15 April 2011
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Figure 1-169. Ethernet MAC ID1 Low Register (MAC_ID1_LO)
R-0
Value Description
0 Reserved. Read returns 0.
0-FFh MAC1 Address – Byte 0.
0-FFh MAC1 Address – Byte 1.
Figure 1-170. Ethernet MAC ID1 High Register (MAC_ID1_HI)
24 23
MACADDR[31:24]
R-eFuse
Value Description
0-FFh MAC1 Address – Byte 2.
0-FFh MAC1 Address – Byte 3.
0-FFh MAC1 Address – Byte 4.
0-FFh MAC1 Address – Byte 5.
© 2011, Texas Instruments Incorporated
Preliminary
Figure 1-169
16 15
MACADDR[7:0]
R-eFuse
Figure 1-170
16 15
MACADDR[39:32]
R-eFuse
Control Module
and described in
8 7
MACADDR[15:8]
R-eFuse
and described in
8 7
MACADDR[47:40]
R-eFuse
Chip Level Resources
0
0
311