Mmu_Sysstatus Field Descriptions - Texas Instruments TMS320C6A816 Series Technical Reference Manual

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1.4.5.2.3 MMU_SYSSTATUS
The MMU_SYSSTATUS register is shown in
31
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Bit Field
31-1 Reserved
0 RESETDONE
SPRUGX9 – 15 April 2011
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Preliminary
Figure 1-27
Figure 1-27. MMU_SYSSTATUS
Reserved
R-0
Table 1-25. MMU_SYSSTATUS Field Descriptions
Value Description
0 Reads returns 0.
Internal reset monitoring.
0 Internal module reset in on-going.
1 Reset completed.
© 2011, Texas Instruments Incorporated
and described in Table 1-25.
Chip Level Resources
System MMU
1 0
RESETDONE
R-0
135