Texas Instruments TMS320C6A816 Series Technical Reference Manual page 88

C6-integra dsp+arm processors
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20-130. CPPI DMA Scheduler Control Register (DMA_SCHED_CTRL) Field Descriptions
20-161. Function Address Register (USBn_FADDR) Field Descriptions
20-162. Power Management Register (USBn_POWER) Field Descriptions
20-163. Interrupt Register for Endpoint 0 Plus Transmit Endpoints 1 to 15 (USBn_INTRTX) Field Descriptions
20-167. Interrupt Register for Common USB Interrupts (USBn_INTRUSB) Field Descriptions
20-168. Interrupt Enable Register for INTRUSB (USBn_INTRUSBE) Field Descriptions
20-169. Frame Number Register (USBn_FRAME) Field Descriptions
Descriptions
20-171. Register to Enable the USB 2.0 Test Modes (USBn_TESTMODE) Field Descriptions
20-173. Maximum Packet Size for Peripheral/Host Transmit Endpoint (USBn_TXMAXP) Field Descriptions
20-174. Control Status Register for Endpoint 0 in Peripheral Mode (USBn_PERI_CSR0) Field Descriptions
20-175. Control Status Register for Endpoint 0 in Host Mode (USBn_HOST_CSR0) Field Descriptions
88
List of Tables
Preliminary
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SPRUGX9 - 15 April 2011
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