Texas Instruments TMS320C6A816 Series Technical Reference Manual page 24

1-97. ELM Revision Register (ELM_REVISION)
1-98. ELM System Configuration Register (ELM_SYSCONFIG)
1-99. ELM System Status Register (ELM_SYSSTATUS)
1-100. ELM Interrupt Status Register (ELM_IRQSTATUS)
1-101. ELM Interrupt Enable Register (ELM_IRQENABLE)
1-102. ELM Location Configuration Register (ELM_LOCATION_CONFIG)
1-103. ELM Page Definition Register (ELM_PAGE_CTRL)
1-104. ELM_SYNDROME_FRAGMENT_0_i Register
1-105. ELM_SYNDROME_FRAGMENT_1_i Register
1-106. ELM_SYNDROME_FRAGMENT_2_i Register
1-107. ELM_SYNDROME_FRAGMENT_3_i Register
1-108. ELM_SYNDROME_FRAGMENT_4_i Register
1-109. ELM_SYNDROME_FRAGMENT_5_i Register
1-110. ELM_SYNDROME_FRAGMENT_6_i Register
1-111. ELM_LOCATION_STATUS_i Register
1-112. ELM_ERROR_LOCATION_0-15_i Registers
1-113. Control Status Register (CONTROL_STATUS)
1-114. 5.1.2. Boot Status Register (BOOTSTAT)
1-115. 5.1.3. DSP Boot Address Register (DSPBOOTADDR)
1-116. Main PLL Control Register (MAINPLL_CTRL)
1-117. Main PLL Powerdown Register (MAINPLL_PWD)
1-118. Main PLL Frequency 1 Register (MAINPLL_FREQ1)
1-119. Main PLL Divider 1 Register (MAINPLL_DIV1)
1-120. Main PLL Frequency 2 Register (MAINPLL_FREQ2)
1-121. Main PLL Divider 2 Register (MAINPLL_DIV2)
1-122. Main PLL Frequency 4 Register (MAINPLL_FREQ4)
1-123. Main PLL Divider 4 Register (MAINPLL_DIV4)
1-124. Main PLL Frequency 5 Register (MAINPLL_FREQ5)
1-125. Main PLL Divider 5 Register (MAINPLL_DIV5)
1-126. Main PLL Divider 6 Register (MAINPLL_DIV6)
1-127. Main PLL Divider 7 Register (MAINPLL_DIV7)
1-128. DDR PLL Control Register (DDRPLL_CTRL)
1-129. DDR PLL Powerdown Register (DDRPLL_PWD)
1-130. DDR PLL Divider 1 Register (DDRPLL_DIV1)
1-131. DDR PLL Frequency 2 Register (DDRPLL_FREQ2)
1-132. DDR PLL Divider 2 Register (DDRPLL_DIV2)
1-133. DDR PLL Frequency 3 Register (DDRPLL_FREQ3)
1-134. DDR PLL Divider 3 Register (DDRPLL_DIV3)
1-135. DDR PLL Frequency 4 Register (DDRPLL_FREQ4)
1-136. DDR PLL Divider 4 Register (DDRPLL_DIV4)
1-137. DDR PLL Frequency 5 Register (DDRPLL_FREQ5)
1-138. DDR PLL Divider 5 Register (DDRPLL_DIV5)
1-139. Video PLL Control Register (VIDEOPLL_CTRL)
1-140. Video PLL Powerdown Register (VIDEOPLL_PWD)
1-141. Video PLL Frequency 1 Register (VIDEOPLL_FREQ1)
1-142. Video PLL Divider 1 Register (VIDEOPLL_DIV1)
1-143. Video PLL Frequency 2 Register (VIDEOPLL_FREQ2)
1-144. Video PLL Divider 2 Register (VIDEOPLL_DIV2)
1-145. Video PLL Frequency 3 Register (VIDEOPLL_FREQ3)
24
List of Figures
Preliminary
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© 2011, Texas Instruments Incorporated
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SPRUGX9 - 15 April 2011
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