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11.3.30 McBSP Revision Number Register (REV_REG)
11.3.31 McBSP Receive Interrupt Clear Register (RINTCLR_REG)
11.3.32 McBSP Transmit Interrupt Clear Register (XINTCLR_REG)
11.3.33 McBSP Receive Overflow Interrupt Clear Register (ROVFLCLR_REG)
11.3.34 McBSP System Configuration Register (SYSCONFIG_REG)
11.3.35 McBSP Transmit Buffer Threshold Register (DMA or IRQ trigger) (THRSH2_REG)
11.3.36 McBSP Receive Buffer Threshold Register (DMA or IRQ trigger) (THRSH1_REG)
11.3.37 McBSP Interrupt Status Register (OCP compliant IRQ line) (IRQSTATATUS)
11.3.38 McBSP Interrupt Enable Register (OCP compliant IRQ line) (IRQENABLE)
11.3.39 McBSP Wakeup Enable Register (WAKEUPEN)
11.3.40 McBSP Transmit Configuration Control Register (XCCR_REG)
11.3.41 McBSP Receive Configuration Control Register (RCCR_REG)
11.3.42 McBSP Transmit Buffer Status Registers (XBUFFSTAT_REG)
11.3.43 McBSP Receive Buffer Status Registers (RBUFFSTAT_REG)
11.3.44 McBSP_STATUS_REG
12
Multichannel Serial Port Interface (McSPI)
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12.1
Introduction
12.1.1 Overview
12.1.2 Features
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12.2
Architecture
12.2.1 SPI Interface
12.2.2 SPI Transmission
12.2.3 Master Mode
12.2.4 Slave Mode
12.2.5 Interrupts
12.2.6 DMA Requests
12.2.7 Emulation Mode
12.2.8 Power Saving Management
12.2.9 System Test Mode
12.2.10 Reset
12.2.11 Access to Data Registers
12.2.12 Programming Aid
12.2.13 Interrupt and DMA Events
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12.3
Registers
12.3.1 McSPI System Configuration Register (MCSPI_SYSCONFIG)
12.3.2 McSPI System Status Register (MCSPI_SYSSTATUS)
12.3.3 McSPI Interrupt Status Register (MCSPI_IRQSTATUS)
12.3.4 McSPI Interrupt Enable Register (MCSPI_IRQENABLE)
12.3.5 McSPI System Register (MCSPI_SYST)
12.3.6 McSPI Module Control Register (MCSPI_MODULCTRL)
12.3.7 McSPI Channel (i) Configuration Register (MCSPI_CH(i)CONF)
12.3.8 McSPI Channel (i) Status Register (MCSPI_CH(i)STAT)
12.3.9 McSPI Channel (i) Control Register (MCSPI_CH(I)CTRL)
12.3.10 McSPI Channel (i) Transmit Register (MCSPI_TX(i))
12.3.11 McSPI Channel (i) Receive Register (MCSPI_RX(i))
12.3.12 McSPI Transfer Levels Register (MCSPI_XFERLEVEL)
13
Peripheral Component Interconnect Express (PCIe)
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13.1
Introduction
13.1.1 Overview
13.1.2 Features
13.1.3 Features Not Supported
13.1.4 Functional Block Diagram
13.1.5 Supported Use Case Statement
SPRUGX9 – 15 April 2011
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