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Device Interrupts
DSP Interrupt Number
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
178
Chip Level Resources
Preliminary
Table 1-65. DSP INTC Interrupt Mapping (continued)
Event
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
INTERR
EMC_IDMAERR
PBISTINT
Reserved
EFIINTA
EFIINTB
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
PMC_ED
Reserved
Reserved
UMC_ED1
UMC_ED2
PDC_INT
SYS_CMPA
PMC_CMPA
PMC_DMPA
DMC_CMPA
DMC_DMPA
UMC_CMPA
UMC_DMPA
EMC_CMPA
EMC_BUSERR
© 2011, Texas Instruments Incorporated
Interrupt Source
Description
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
INTC
C674x Interrupt Controller Dropped CPU
Interrupt Event
EMC
C674x EMC Invalid IDMA Parameters
event
PBIST
PBIST event
Reserved
EFI
EFI Interrupt from side A event
EFI
EFI Interrupt from side B event
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
PMC
PMC event
Reserved
Reserved
UMC
L2 single bit error detected event
UMC
L2 two bit error detected event
PDC
Power Down sleep interrupt event
SYS
SYS event
PMC
L1P CPU memory protection fault event
PMC
L1P DMA memory protection fault event
DMC
L1D CPU memory protection fault event
DMC
L1D DMA memory protection fault event
UMC
L2 CPU memory protection fault event
UMC
L2 DMA memory protection fault event
EMC
IDMA CPU memory protection fault event
EMC
IDMA Bus error interrupt event
www.ti.com
SPRUGX9 – 15 April 2011
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