Texas Instruments TMS320C6A816 Series Technical Reference Manual page 39

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10-77. DIT Right Channel User Data Registers (DITUDRB0-DITUDRB5)
10-78. Transmit Buffer Registers (XBUFn)
10-79. Receive Buffer Registers (RBUFn)
10-80. Write FIFO Control Register (WFIFOCTL)
10-81. Write FIFO Status Register (WFIFOSTS)
10-82. Read FIFO Control Register (RFIFOCTL)
10-83. Read FIFO Status Register (RFIFOSTS)
11-1. McBSP Block Diagram
11-2. McBSP Data Transfer Paths
11-3. Clock Signal Control of Bit Transfer Timing
11-4. McBSP Operating at Maximum Packet Frequency
11-5. Single-Phase Frame for a McBSP Data Transfer
11-6. Dual-Phase Frame for a McBSP Data Transfer
11-7. McBSP Reception Physical Data Path
11-8. McBSP Reception Signal Activity
11-9. McBSP Transmission Physical Data Path
11-10. McBSP Transmission Signal Activity
11-11. Sample Rate Generator Block Diagram
11-12. CLKG Synchronization and FSG Generation (GSYNC = 1 and CLKGDV = 1)
11-13. CLKG Synchronization and FSG Generation (GSYNC = 1 and CLKGDV = 3h)
11-14. Overrun in the McBSP Receiver
11-15. Unexpected Frame-Sync Pulse During a McBSP Reception
11-16. Proper Positioning of Receive Frame-Sync Pulses
11-17. Unexpected Frame-Sync Pulse During a McBSP Transmission
11-18. Proper Positioning of Transmit Frame-Sync Pulses
11-19. McBSP Data Transfer in the 8-Partition Mode
11-20. Alternating Between Partitions A and B Channels
11-21. Activity on McBSP Pins for the Possible Values of XMCM Bit
11-22. Transmit Full Cycle Mode
11-23. Transmit Half Cycle Mode
11-24. Receive Full Cycle Mode
11-25. Receive Half Cycle Mode
11-26. Range of Programmable Data Delay
11-27. 2-Bit Data Delay Used to Skip a Framing Bit
11-28. Data Externally Clocked on a Rising Edge and Sampled on a Falling Edge
11-29. Frame of 16 CLKG Periods and Active Width of 2 CLKG Periods
11-30. Range of Programmable Data Delay
11-31. 2-Bit Data Delay Used to Skip a Framing Bit
11-32. Frame of 16 CLKG Periods and Active Width of 2 CLKG Periods
11-33. McBSP_DRR_REG
11-34. McBSP_DRR_REG
11-35. McBSP_SPCR2_REG
11-36. McBSP_SPCR1_REG
11-37. McBSP_RCR2_REG
11-38. McBSP_RCR1_REG
11-39. McBSP_XCR2_REG
11-40. McBSP_XCR1_REG
11-41. McBSP_SRGR2_REG
11-42. McBSP_SRGR1_REG
SPRUGX9 - 15 April 2011
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© 2011, Texas Instruments Incorporated
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List of Figures
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