Texas Instruments TMS320C6A816 Series Technical Reference Manual page 66

6-18. IP Revision Identifier Register (HDMI_WP_REVISION)
6-19. Clock Management Configuration Register (HDMI_WP_SYSCONFIG) Field Descriptions
6-20. Raw Interrupt Status Register (HDMI_WP_IRQSTATUS_RAW) Field Descriptions
6-21. Interrupt Status Register (HDMI_WP_IRQSTATUS) Field Descriptions
6-22. Interrupt Enable Register (HDMI_WP_IRQENABLE_SET) Field Descriptions
6-23. Interrupt Disable Register (HDMI_WP_IRQENABLE_CLEAR) Field Descriptions
6-24. Glitch Filter Register (HDMI_WP_DEBOUNCE) Field Descriptions
6-25. Configuration of HDMI Wrapper Video Register (HDMI_WP_VIDEO_CFG) Field Descriptions
6-26. Configuration of Clocks Register (HDMI_WP_CLK) Field Descriptions
6-27. Audio Configuration in FIFO Register (HDMI_WP_AUDIO_CFG) Field Descriptions
6-28. Audio Configuration of DMA Register (HDMI_WP_AUDIO_CFG2) Field Descriptions
6-29. Audio FIFO Control Register (HDMI_WP_AUDIO_CTRL) Field Descriptions
6-30. TX Data of FIFO Register (HDMI_WP_AUDIO_DATA) Field Descriptions
6-31. HDMI_IP_CORE_SYSTEM Registers Summary
6-32. Vendor ID Register (VND_IDL) Field Descriptions
6-33. Vendor ID Register (VND_IDH) Field Descriptions
6-34. Device IDL Register (DEV_IDL) Field Descriptions
6-35. Device IDH Register (DEV_IDH) Field Descriptions
6-36. Device Revision Register (DEV_REV) Field Descriptions
6-37. Software Reset Register (SRST) Field Descriptions
6-38. System Control Register 1 (SYS_CTRL1) Field Descriptions
6-39. System Status Register (SYS_STAT) Field Descriptions
6-40. System Control Register 3 (SYS_CTRL3) Field Descriptions
6-41. Data Control Register (DCTL) Field Descriptions
6-42. HDCP Control Register (HDCP_CTRL) Field Descriptions
6-43. HDCP BKSV Register (BKSV__0-BKSV__4) Field Descriptions
6-44. HDCP AN Register (AN__0-AN__7) Field Descriptions
6-45. HDCP AKSV Register (AKSV__0-AKSV__4) Field Descriptions
6-46. HDCP Ri Register (RI1) Field Descriptions
6-47. HDCP Ri2 Register (RI2) Field Descriptions
6-48. HDCP Ri 128 Compare Register (RI_128_COMP) Field Descriptions
6-49. HDCP I Counter Register (I_CNT) Field Descriptions
6-50. Ri Status Register (RI_STAT) Field Descriptions
6-51. Ri Command Register (RI_CMD) Field Descriptions
6-52. Ri Line Start Register (RI_START) Field Descriptions
6-53. Ri From RX Register (Low) (RI_RX_L) Field Descriptions
6-54. Ri From RX Registers (High) (RI_RX_H) Field Descriptions
6-55. Ri Debug Registers (RI_DEBUG) Field Descriptions
6-56. VIDEO DE Delay Register (DE_DLY) Field Descriptions
6-57. VIDEO DE Control Register (DE_CTRL) Field Descriptions
6-58. VIDEO DE Top Register (DE_TOP) Field Descriptions
6-59. VIDEO DE Count Register (DE_CNTL) Field Descriptions
6-60. VIDEO DE Count Register (DE_CNTH) Field Descriptions
6-61. VIDEO DE Line Register (DE_LINL) Field Descriptions
6-62. VIDEO DE Line Register (DE_LINH_1) Field Descriptions
6-63. Video H Resolution Register (HRES_L) Field Descriptions
6-64. Video H Resolution Register (HRES_H) Field Descriptions
6-65. Video V Resolution Low Register (VRES_L) Field Descriptions
6-66. Video V Resolution Register (VRES_H) Field Descriptions
66
List of Tables
Preliminary
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© 2011, Texas Instruments Incorporated
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SPRUGX9 - 15 April 2011
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