Texas Instruments TMS320C6A816 Series Technical Reference Manual page 48

16-7. Command Completion Coalescing Control Register (CCC_CTL)
16-8. Command Completion Coalescing Ports Register (CCC_PORTS)
16-9. BIST Active FIS Register (BISTAFR)
16-10. BIST Control Register (BISTCR)
16-11. BIST FIS Count Register (BISTFCTR)
16-12. BIST Status Register (BISTSR)
16-13. BIST DWORD Error Count Register (BISTDECR)
16-14. BIST DWORD Error Count Register (TIMER1MS)
16-15. Global Parameter 1 Register (GPARAM1R)
16-16. Global Parameter 2 Register (GPARAM2R)
16-17. Port Parameter Register (PPARAMR)
16-18. Test Register (TESTR)
16-19. Version Register (VERSIONR)
16-20. ID Register (IDR)
16-21. Port Command List Base Address Register (P#CLB)
16-22. Port FIS Base Address Register (P#FB)
16-23. Port Interrupt Status Register (P#IS)
16-24. Port Interrupt Enable Register (P#IE)
16-25. Port Command Register (P#CMD)
16-26. Port Task File Data Register (P#TFD)
16-27. Port Signature Register (P#SIG)
16-28. Port Serial ATA Status Register (P#SSTS)
16-29. Port Serial ATA Control Register (P#SCTL)
16-30. Port Serial ATA Error Register (P#SERR)
16-31. Port Serial ATA Active Register (P#SACT)
16-32. Port Command Issue Register (P#CI)
16-33. Port Serial ATA Notification Register (P#SNTF)
16-34. Port DMA Control Register (P#DMACR)
16-35. Port PHY Control Register (P#PHYCR)
16-36. Port PHY Status Register (P#PHYSR)
16-37. Idle Register (IDLE)
16-38. PHY Configuration Register 2 (PHYCFGR2)
17-1. Timer Block Diagram
17-2. TCRR Timing Value
17-3. Capture Wave Example for CAPT_MODE = 0
17-4. Capture Wave Example for CAPT_MODE = 1
17-5. Timing Diagram of Pulse-Width Modulation with SCPWM = 0
17-6. Timing Diagram of Pulse-Width Modulation with SCPWM = 1
17-7. Identification Register (TIDR) Register
17-8. Timer OCP Configuration Register (TIOCP_CFG)
17-9. Timer IRQ EOI Register (IRQ_EOI)
17-10. Timer IRQSTATUS Raw Register (IRQSTATUS_RAW)
17-11. Timer IRQSTATUS Register (IRQSTATUS)
17-12. 3Timer IRQENABLE Set Register (IRQENABLE_SET)
17-13. Timer IRQENABLE Clear Register (IRQENABLE_CLR)
17-14. Timer IRQ Wakeup Enable Register (IRQWAKEEN)
17-15. Timer Control Register (TCLR)
17-16. Timer Counter Register (TCRR)
17-17. Timer Load Register (TLDR)
48
List of Figures
Preliminary
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© 2011, Texas Instruments Incorporated
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SPRUGX9 - 15 April 2011
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