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Registers
Table 2-22. DMM_PAT_IRQSTATUS Register Field Descriptions (continued)
Bit
Field
5
ERR_UPD_CTRL0
4
ERR_UPD_AREA0
3
ERR_INV_DATA0
2
ERR_INV_DSC0
1
FILL_LST0
0
FILL_DSC0
396
DMM/TILER
Preliminary
Value
Description
0
Control register update whilst refilling error event in area 0
0
Area register update whilst refilling error event in area 0
0
Invalid entry-table pointer error event in area 0
0
Invalid descriptor pointer error event in area 0
0
End of refill event for the last descriptor in area 0
0
End of refill event for any descriptor in area 0
© 2011, Texas Instruments Incorporated
www.ti.com
Type
R/W1C
R/W1C
R/W1C
R/W1C
R/W1C
R/W1C
SPRUGX9 – 15 April 2011
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