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1.11 Bus Interconnect
The SoC interconnect is based on a 2-level hierarchical architecture (L3, L4) driven by system
performance.
L4 interconnect is based on a fully native OCP infrastructure, directly complying with the
OCPIP2.2reference standard.
1.11.1 Terminology
The following is a brief explanation of some terms used in this document:
Initiator — Module able to initiate read and write requests to the chip interconnect (typically: processors,
DMA, etc.).
Target— Unlike an initiator, a target module cannot generate read/write requests to the chip interconnect,
but it can respond to these requests. However, it may generate interrupts or a DMA request to the
system (typically: peripherals, memory controllers).
Note: A module can have several separate ports; therefore, a module can be an initiator and a
target.
Agent— Each connection of one module to one interconnect is done using an agent, which is an
adaptation (sometimes configurable) between the module and the interconnect. A target module is
connected by a target agent (TA), and an initiator module is connected by an initiator agent (IA).
Interconnect— The decoding, routing, and arbitration logic that enables the connection between multiple
initiator modules and multiple target modules connected on it.
Register target (RT)— Special TA used to access the interconnect internal configuration registers.
Data-flow signal— Any signal that is part of a clearly identified transfer or data flow (typically: command,
address, byte enables, etc.). Signal behavior is defined by the protocol semantics.
Sideband signal— Any signal whose behavior is not associated to a precise transaction or data flow.
Command Slot— A command slot is a subset of the command list. It is the memory buffer for a single
command. A total of 32 command slots exist.
Out-of-band error— Any signal whose behavior is associated to a device error-reporting scheme, as
opposed to in-band errors.
Note: Interrupt requests and DMA requests are not routed by the interconnect in the device.
ConnID— Any transaction in the system interconnect is tagged by an in-band qualifier ConnID, which
uniquely identifies the initiator at a given interconnect point. A ConnID is transmitted in band with
the request and is used for firewall and error-logging mechanism.
1.11.2 L3 Interconnect
The L3 high-performance interconnect is based on a Network On Chip (NoC) interconnect infrastructure.
The NoC uses an internal packet-based protocol for forward (read command, write command with data
payload) and backward (read response with data payload, write response) transactions. All exposed
interfaces of this NoC interconnect, both for Targets and Initiators; comply with the OCPIP2.2 reference
standard.
SPRUGX9 – 15 April 2011
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