Table of Contents
Advertisement
Introduction
3.1
Introduction
3.1.1 Overview
The EMAC controls the flow of packet data from the system to the PHY. The MDIO module controls PHY
configuration and status monitoring.
Both the EMAC and the MDIO modules interface to the system core through a custom interface that
allows efficient data transmission and reception. This custom interface is referred to as the EMAC control
module and is considered integral to the EMAC/MDIO peripheral.
The EMAC module is used to move data between this device and another host connected to the same
network, in compliance with the Ethernet protocol.
3.1.2 Features
The EMAC/MDIO has the following features:
•
Synchronous 10/100/1000 Mbps operation
•
G/MII interface to the physical layer device (PHY)
•
Full-duplex gigabit operation (half-duplex not supported)
•
EMAC acts as DMA master to either internal or external device memory space
•
Hardware error handling including CRC
•
Eight receive channels with VLAN tag discrimination for receive quality-of-service (QOS) support
•
Eight transmit channels with round-robin or fixed priority for transmit quality-of-service (QOS) support
•
Ether-Stats and 802.3-Stats RMON statistics gathering
•
Transmit CRC generation selectable on a per channel basis
•
Broadcast frames selection for reception on a single channel
•
Multicast frames selection for reception on a single channel
•
Promiscuous receive mode frames selection for reception on a single channel (all frames, all good
frames, short frames, error frames)
•
Hardware flow control
•
8K-byte local EMAC descriptor memory that allows the peripheral to operate on descriptors without
affecting the CPU. The descriptor memory holds enough information to transfer up to 512 Ethernet
packets without CPU intervention.
•
Programmable interrupt logic permits the software driver to restrict the generation of back-to-back
interrupts, which allows more work to be performed in a single call to the interrupt service routine.
•
TI Adaptive Performance Optimization for improved half duplex performance
•
Configurable receive address matching/filtering, receive FIFO depth, and transmit FIFO depth
•
No-chain mode truncates frame to first buffer for network analysis applications
•
Emulation support
•
Loopback mode
406
EMAC/MDIO Module
Preliminary
© 2011, Texas Instruments Incorporated
www.ti.com
SPRUGX9 – 15 April 2011
Submit Documentation Feedback
Advertisement
Table of Contents
