Transmit Data Buffer Register (Scitd) Field Descriptions; Sci Pin I/O Control Register 2 (Scipio2) Field Descriptions - Texas Instruments TMS320 Series User Manual

SCI/BLIN Control Registers
31
15
Reserved
LEGEND: R/W = Read/Write; R = Read only; W = Write in SCI-compatible mode only; -n = value after reset
Table 22. Transmit Data Buffer Register (SCITD) Field Descriptions
Bit Field
31-8 Reserved
7-0 TD
Note: Data written to the SCITD register that is fewer than eight bits long must be right justified, but
it need not be padded with leading zeros.
6.14 SCI Pin I/O Control Register 2 (SCIPIO2)
This register enables the current value of LINTX and LINRX pins to be read.
The SCI Pin I/O Control Register 2 (SCIPIO2) is shown in
31
15
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 23. SCI Pin I/O Control Register 2 (SCIPIO2) Field Descriptions
Bit Field
31-3 Reserved
2 TX IN
72 Local Interconnect Network (LIN) Module
Figure 35. Transmit Data Buffer Register (SCITD)
R-0
Value Description
Reads return zero and writes have no effect.
0–FFh Transmit data.
This bit is effective in SCI-compatible mode only. The transfer of data from this register to the
transmit shift register SCITXSHF sets the TXRDY flag (SCIFLR[23];
that SCITD is ready to be loaded with another byte of data.
Note: If TX INT ENA (register SCISETINT[8];
interrupt.
Figure 36. SCI Pin I/O Control Register 2 (SCIPIO2)
Reserved
R-0
Value Description
Reads return zero and writes have no effect.
Transmit data in.
This bit is effective in LIN or SCI-compatible mode. This bit contains the current value on the SCITX
pin.
0 The SCITX pin is at logic low (0).
1 The SCITX pin is at logic high (1).
Preliminary
Reserved
R-0
8 7
Section 6.4) is set, this data transfer also causes an
Figure 36 and described in
Reserved
R-0
3
TD
R/W-0
Section 6.8 ), which indicates
Table 23.
2 1
TX IN RX IN
R-x R-x
SPRUGE2A – May 2009 – Revised June 2009
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16
0
16
0
Reserved
R-0