Table 246. Usart Register Map And Reset Values - ST STM32WL55JC Reference Manual

Low-power universal asynchronous receiver transmitter (LPUART)
36.2 LPUART main features
• Full-duplex asynchronous communications
•
NRZ standard format (mark/space)
• Programmable baud rate
•
From 300 baud to 9600 baud using a 32.768 kHz clock source.
• Higher baud rates can be achieved by using a higher frequency clock source
•
Two internal FIFOs to transmit and receive data
Each FIFO can be enabled/disabled by software and come with status flags for FIFOs
states.
•
Dual clock domain with dedicated kernel clock for peripherals independent from PCLK.
•
Programmable data word length (7 or 8 or 9 bits)
•
Programmable data order with MSB-first or LSB-first shifting
• Configurable stop bits (1 or 2 stop bits)
•
Single-wire Half-duplex communications
• Continuous communications using DMA
•
Received/transmitted bytes are buffered in reserved SRAM using centralized DMA.
• Separate enable bits for transmitter and receiver
•
Separate signal polarity control for transmission and reception
• Swappable Tx/Rx pin configuration
•
Hardware flow control for modem and RS-485 transceiver
• Transfer detection flags:
–
–
–
• Parity control:
–
–
•
Four error detection flags:
–
–
–
–
•
Interrupt sources with flags
•
Multiprocessor communications: wakeup from Mute mode by idle line detection or
address mark detection
1206/1454
Receive buffer full
Transmit buffer empty
Busy and end of transmission flags
Transmits parity bit
Checks parity of received data byte
Overrun error
Noise detection
Frame error
Parity error
RM0453 Rev 2
RM0453