Clock Stop Register 2 (Ckstpr2) - Renesas H8/3847R Series Hardware Manual

8-bit single-chip microcomputer super low power
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Section 13 LCD Controller/Driver
13.2.4

Clock Stop Register 2 (CKSTPR2)

Bit
7
Initial value
1
Read/Write
CKSTPR2 is an 8-bit read/write register that performs module standby mode control for peripheral
modules. Only the bit relating to the LCD controller/driver is described here. For details of the
other bits, see the sections on the relevant modules.
Bit 0: LCD controller/driver module standby mode control (LDCKSTP)
Bit 0 controls setting and clearing of module standby mode for the LCD controller/driver.
Bit 0
LDCKSTP
Description
0
LCD controller/driver is set to module standby mode
1
LCD controller/driver module standby mode is cleared
Rev. 6.00 Aug 04, 2006 page 440 of 680
REJ09B0145-0600
6
5
4
1
1
1
3
2
AECKSTP
WDCKSTP
PWCKSTP
1
1
R/W
R/W
1
0
LDCKSTP
1
1
R/W
R/W
(initial value)

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