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10.3.2
Register Descriptions
1. Receive Shift Register (RSR)
Bit
7
Read/Write
RSR is a register used to receive serial data. Serial data input to RSR from the RXD
the order in which it is received, starting from the LSB (bit 0), and converted to parallel data.
When one byte of data is received, it is transferred to RDR automatically.
RSR cannot be read or written directly by the CPU.
2. Receive Data Register (RDR)
Bit
7
RDR7
Initial value
0
Read/Write
R
RDR is an 8-bit register that stores received serial data.
When reception of one byte of data is finished, the received data is transferred from RSR to RDR,
and the receive operation is completed. RSR is then able to receive data. RSR and RDR are
double-buffered, allowing consecutive receive operations.
RDR is a read-only register, and cannot be written by the CPU.
RDR is initialized to H'00 upon reset, and in standby, watch or module standby mode.
6
5
6
5
RDR6
RDR5
RDR4
0
0
R
R
Section 10 Serial Communication Interface
4
3
2
4
3
2
RDR3
RDR2
0
0
0
R
R
R
Rev. 6.00 Aug 04, 2006 page 351 of 680
1
0
pin is set in
3X
1
0
RDR1
RDR0
0
0
R
R
REJ09B0145-0600
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