Clock Stop Register 1 (Ckstpr1) - Renesas H8/3847R Series Hardware Manual

Bit 7: A/D start flag (ADSF)
Bit 7 controls and indicates the start and end of A/D conversion.
Bit 7
ADSF Description
0 Read: Indicates the completion of A/D conversion
Write: Stops A/D conversion
1 Read: Indicates A/D conversion in progress
Write: Starts A/D conversion
Bits 6 to 0: Reserved bits
Bits 6 to 0 are reserved; they are always read as 1, and cannot be modified.
12.2.4

Clock Stop Register 1 (CKSTPR1)

Bit 7
S1CKSTP
Initial value 1
Read/Write R/W
CKSTPR1 is an 8-bit read/write register that performs module standby mode control for peripheral
modules. Only the bit relating to the A/D converter is described here. For details of the other bits,
see the sections on the relevant modules.
Bit 4: A/D converter module standby mode control (ADCKSTP)
Bit 4 controls setting and clearing of module standby mode for the A/D converter.
ADCKSTP Description
0 A/D converter is set to module standby mode
1 A/D converter module standby mode is cleared
6 5
S31CKSTP S32CKSTP ADCKSTP TGCKSTP
1 1
R/W R/W
4 3
TFCKSTP TCCKSTP TACKSTP
1 1
R/W R/W R/W
Rev. 6.00 Aug 04, 2006 page 423 of 680
Section 12 A/D Converter
(initial value)
2 1 0
1 1 1
R/W R/W
(initial value)
REJ09B0145-0600