External Interrupts - Renesas H8/3847R Series Hardware Manual

8-bit single-chip microcomputer super low power

Table of Contents

Bit n: WKPn edge select (WKEGSn)

Bit n selects WKPn pin input sensing.

WKPn pin falling edge detected

WKPn pin rising edge detected

External Interrupts

There are 13 external interrupts: IRQ

1. Interrupts WKP

Interrupts WKP

. When these pins are designated as pins WKP

rising or falling edge is input, the corresponding bit in IWPR is set to 1, requesting an interrupt.

Recognition of wakeup interrupt requests can be disabled by clearing the IENWP bit to 0 in

IENR1. These interrupts can all be masked by setting the I bit to 1 in CCR.

number 9 is assigned to interrupts WKP

vector number, so the interrupt-handling routine must discriminate the interrupt source.

2. Interrupts IRQ

Interrupts IRQ4 to IRQ

detected by either rising edge sensing or falling edge sensing, depending on the settings of bits

When these pins are designated as pins IRQ

designated edge is input, the corresponding bit in IRR1 is set to 1, requesting an interrupt.

Recognition of these interrupt requests can be disabled individually by clearing bits IEN4 to IEN0

to 0 in IENR1. These interrupts can all be masked by setting the I bit to 1 in CCR.

interrupt exception handling is initiated, the I bit is set to 1 in CCR. Vector

numbers 8 to 4 are assigned to interrupts IRQ

(low). Table 3.2 gives details.

are requested by either rising or falling edge input to pins WKP

interrupt exception handling is initiated, the I bit is set to 1 in CCR. Vector

are requested by input signals to pins IRQ

in port mode register 5 and a

. All eight interrupt sources have the same

in port mode register 3 and 1 and the

. The order of priority is from IRQ

Rev. 6.00 Aug 04, 2006 page 107 of 680

Section 3 Exception Handling

(initial value)

. These interrupts are

REJ09B0145-0600

(n = 7 to 0)