Renesas H8/3847R Series Hardware Manual page 596

8-bit single-chip microcomputer super low power
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Appendix A CPU Instruction Set
Instruc-
tion
Mnemonic
MOV
MOV.B Rs, @(d:16,
Rd)
MOV.B Rs, @–Rd
MOV.B Rs, @aa:8
MOV.B Rs, @aa:16
MOV.W #xx:16, Rd
MOV.W Rs, Rd
MOV.W @Rs, Rd
MOV.W @(d:16, Rs),
Rd
MOV.W @Rs+, Rd
MOV.W @aa:16, Rd
MOV.W Rs, @Rd
MOV.W Rs, @(d:16,
Rd)
MOV.W Rs, @–Rd
MOV.W Rs, @aa:16
MULXU
MULXU.B Rs, Rd
NEG
NEG.B Rd
NOP
NOP
NOT
NOT.B Rd
OR
OR.B #xx:8, Rd
OR.B Rs, Rd
ORC
ORC #xx:8, CCR
ROTL
ROTL.B Rd
ROTR
ROTR.B Rd
ROTXL
ROTXL.B Rd
ROTXR
ROTXR.B Rd
RTE
RTE
RTS
RTS
SHAL
SHAL.B Rd
SHAR
SHAR.B Rd
SHLL
SHLL.B Rd
SHLR
SHLR.B Rd
SLEEP
SLEEP
STC
STC CCR, Rd
Rev. 6.00 Aug 04, 2006 page 558 of 680
REJ09B0145-0600
Instruction
Branch
Fetch
Addr. Read
I
J
2
1
1
2
2
1
1
2
1
2
1
2
1
2
1
1
1
1
1
1
1
1
1
1
1
2
2
1
1
1
1
1
1
Stack
Byte Data
Word Data
Operation
Access
Access
K
L
M
1
1
1
1
1
1
1
1
1
1
1
1
2
1
Internal
Operation
N
2
2
2
12
2
2

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