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Section 5 Power-Down Modes
5.6
Subactive Mode
5.6.1
Transition to Subactive Mode
Subactive mode is entered from watch mode if a timer A, timer F, timer G, IRQ
WKP0 interrupt is requested while the LSON bit in SYSCR1 is set to 1. From subsleep mode,
subactive mode is entered if a timer A, timer C, timer F, timer G, asynchronous counter, SCI1,
SCI3-1, SCI3-2, IRQ
4
mode does not take place if the I bit of CCR is set to 1 or the particular interrupt is disabled in the
interrupt enable register.
5.6.2
Clearing Subactive Mode
Subactive mode is cleared by a SLEEP instruction or by a low input at the RES pin.
• Clearing by SLEEP instruction
If a SLEEP instruction is executed while the SSBY bit in SYSCR1 is set to 1 and TMA3 bit in
TMA is set to 1, subactive mode is cleared and watch mode is entered. If a SLEEP instruction
is executed while SSBY = 0 and LSON = 1 in SYSCR1 and TMA3 = 1 in TMA, subsleep
mode is entered. Direct transfer to active mode is also possible; see section 5.8, Direct
Transfer, below.
• Clearing by RES pin
Clearing by RES pin is the same as for standby mode; see 2. Clearing by RES pin in section
5.3.2.
5.6.3
Operating Frequency in Subactive Mode
The operating frequency in subactive mode is set in bits SA1 and SA0 in SYSCR2. The choices
are φ
/2, φ
/4, and φ
W
W
W
Rev. 6.00 Aug 04, 2006 page 146 of 680
REJ09B0145-0600
to IRQ
, or WKP
to WKP
0
7
/8.
interrupt is requested. A transition to subactive
0
, or WKP
to
0
7
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