Operation Timing; Figure 15.1 Clock Input Timing; Figure 15.2 Res Low Width; Figure 15.3 Input Timing - Renesas H8/3847R Series Hardware Manual

15.9

Operation Timing

Figures 15.1 to 15.8 show timing diagrams.
V
IH
OSC1
x
1
V
IL
EXCL
RES
IRQ to IRQ
,
0 4
WKP to WKP
,
0 7
ADTRG,
TMIC, TMIF,
TMIG, AEVL,
AEVH
t , tw
OSC
t t
CPH CPL
t t
CPr CPf

Figure 15.1 Clock Input Timing

V
IL
Figure 15.2 RES RES RES Low Width RES
V
IH
V
IL
t
IL

Figure 15.3 Input Timing

Section 15 Electrical Characteristics
t
REL
t
IH
Rev. 6.00 Aug 04, 2006 page 535 of 680
REJ09B0145-0600