Renesas H8/3847R Series Hardware Manual page 137

2. Interrupt Enable Register 1 (IENR1)
Bit 7
IENTA
Initial value 0
Read/Write R/W
IENR1 is an 8-bit read/write register that enables or disables interrupt requests.
Bit 7: Timer A interrupt enable (IENTA)
Bit 7 enables or disables timer A overflow interrupt requests.
Bit 7
IENTA Description
0 Disables timer A interrupt requests
1 Enables timer A interrupt requests
Bit 6: SCI1 interrupt enable (IENS1)
Bit 6 enables or disables SCI1 transfer complete interrupt requests.
Bit 6
IENS1 Description
0 Disables SCI1 interrupt requests
1 Enables SCI1 interrupt requests
Bit 5: Wakeup interrupt enable (IENWP)
Bit 5 enables or disables WKP
Bit 5
IENWP Description
Disables WKP
0
Enables WKP
1
6 5
IENS1 IENWP IEN4
0 0
R/W R/W R/W
to WKP interrupt requests.
7 0
to WKP
interrupt requests
7 0
to WKP
interrupt requests
7 0
Section 3 Exception Handling
4 3 2
IEN3 IEN2
0 0 0
R/W R/W
Rev. 6.00 Aug 04, 2006 page 99 of 680
1 0
IEN1 IEN0
0 0
R/W R/W
(initial value)
(initial value)
(initial value)
REJ09B0145-0600