Figure 9.18 Typical Watchdog Timer Operations (Example) - Renesas H8/3847R Series Hardware Manual

8-bit single-chip microcomputer super low power
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Section 9 Timers
Figure 9.18 shows an example of watchdog timer operations.
Example: φ = 2 MHz and the desired overflow period is 30 ms.
The value set in TCW should therefore be 256 – 8 = 248 (H'F8).
H'FF
H'F8
TCW count
value
H'00
H'F8 written
in TCW
Internal reset
signal

Figure 9.18 Typical Watchdog Timer Operations (Example)

Rev. 6.00 Aug 04, 2006 page 318 of 680
REJ09B0145-0600
2 × 10
6
× 30 × 10
–3
8192
Start
H'F8 written in TCW
= 7.3
Reset
512 φ
OSC
TCW overflow
clock cycles

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