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WPR—Wakeup Interrupt Request Register
Bit
7
IWPF7
Initial value
0
Read/Write
R/(W)*
Note: * All bits can only be written with 0, for flag clearing.
6
5
IWPF6
IWPF5
IWPF4
0
0
R/(W)*
R/(W)*
R/(W)*
Wakeup interrupt request register
0 [Clearing condition]
When IWPFn = 1, it is cleared by writing 0
1 [Setting condition]
When pin WKPn is designated for wakeup input and a
falling edge is input at that pin
Appendix B Internal I/O Registers
H'F9
4
3
2
IWPF3
IWPF2
0
0
0
R/(W)*
R/(W)*
Rev. 6.00 Aug 04, 2006 page 627 of 680
System control
1
0
IWPF1
IWPF0
0
0
R/(W)*
R/(W)*
(n = 7 to 0)
REJ09B0145-0600
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