Renesas H8/3847R Series Hardware Manual page 374

Section 10 Serial Communication Interface
Bit 3: Clock source select 3 (CKS3)
Bit 3 selects the clock source to be supplied and sets the SCK
Bit 3
CKS3 Description
0 Clock source is prescaler S, SCK
1 Clock source is external clock, SCK
Bits 2 to 0: Clock select 2 to 0 (CKS2 to CKS0)
When CKS3 is cleared to 0, bits 2 to 0 selects the prescaler division ratio and the serial clock
cycle.
Bit 2 Bit 1
CKS2 CKS1
0 0
0 0
0 1
0 1
1 0
1 0
1 1
1 1
2. Serial Control Status Register 1 (SCSR1)
Bit 7
—
Initial value 1
Read/Write —
Note: * Only a write of 0 for flag clearing is possible.
SCSR1 is an 8-bit register that indicates the operational and error status of SCI1.
Upon reset, SCSR1 is initialized to H'9C.
Rev. 6.00 Aug 04, 2006 page 336 of 680
REJ09B0145-0600
Bit 0
CKS0 Prescaler Division Ratio
φ/1024 (initial value)
0
φ/256
1
φ/64
0
φ/32
1
φ/16
0
φ/8
1
φ/4
0
φ
1 /4
W
6 5
SOL ORER
0 0
R/W R/(W)*
pin to input or output mode.
1
is output pin
1
is input pin
1
Serial Clock Cycle
φ φ φ φ = 2.5 MHz
409.6 µs
102.4 µs
25.6 µs
12.8 µs
6.4 µs
3.2 µs
1.6 µs
122 µs
4 3
— —
1 1
— —
(initial value)
2 1 0
— MTRF STF
1 0 0
— R R/W