Renesas H8/3847R Series Hardware Manual page 402

Section 10 Serial Communication Interface
Bit 1: Multiprocessor bit receive (MPBR)
Bit 1 stores the multiprocessor bit in a receive character during multiprocessor format reception in
asynchronous mode.
Bit 1 is a read-only bit and cannot be modified.
Bit 1
MPBR Description
0 Data in which the multiprocessor bit is 0 has been received*
1 Data in which the multiprocessor bit is 1 has been received
Note: * When bit RE is cleared to 0 in SCR3 with the multiprocessor format, bit MPBR is not
affected and retains its previous state.
Bit 0: Multiprocessor bit transfer (MPBT)
Bit 0 stores the multiprocessor bit added to transmit data when transmitting in asynchronous
mode. The bit MPBT setting is invalid when synchronous mode is selected, when the
multiprocessor communication function is disabled, and when not transmitting.
Bit 0
MPBT Description
0 A 0 multiprocessor bit is transmitted
1 A 1 multiprocessor bit is transmitted
8. Bit Rate Register (BRR)
Bit 7
BRR7
Initial value 1
Read/Write R/W
BRR is an 8-bit register that designates the transmit/receive bit rate in accordance with the baud
rate generator operating clock selected by bits CKS1 and CKS0 of the serial mode register (SMR).
BRR can be read or written by the CPU at any time.
BRR is initialized to H'FF upon reset, and in standby, module standby, or watch mode.
Rev. 6.00 Aug 04, 2006 page 364 of 680
REJ09B0145-0600
6 5
BRR6 BRR5 BRR4
1 1
R/W R/W R/W
4 3 2
BRR3 BRR2
1 1 1
R/W R/W
(initial value)
(initial value)
1 0
BRR1 BRR0
1 1
R/W R/W