Renesas H8/3847R Series Hardware Manual page 375

Bit 7: Reserved bit
Bits 7 is reserved; it is always read as 1 and cannot be modified.
Bit 6: Extension data bit (SOL)
The SOL bit changes the output level of the SO
the SO pin. After transfer is completed, SO
1
transmit data, and therefore the SO
before or after transmission. However, the SOL bit setting becomes invalid when the next
transmission starts*. Therefore, when changing the SO
operation must be performed on the SOL bit each time transmission is completed. Writing to this
register during data transfer will cause incorrect operation, so this register should not be
manipulated during transmission.
Note: * The SOL bit setting is also invalid in SSB mode.
Bit 6
SOL Description
0 Read
Write
1 Read
Write
Bit 5: Overrun error flag (ORER)
Bit 5 indicates that an overrun error has occurred when using an external clock. If extra pulses are
superimposed on the regular serial clock due to extraneous noise, etc., the transfer data cannot be
guaranteed. If the clock is input after transfer is completed, this will be interpreted as an overrun
state and this bit will be set to 1.
Bit 5
ORER Description
0 Clearing condition:
After reading ORER = 1, cleared by writing 0 to ORER
1 Setting condition:
When an external clock is used and the clock is input after transfer is completed
Bits 4 to 2: Reserved bits
Bits 4 to 2 are reserved; they are always read as 0 and cannot be modified.
pin output retains the value of the last bit of the
1
pin output level can be changed by manipulating this bit
1
SO pin output level is low
1
Changes SO pin output to low level
1
SO pin output level is high
1
Changes SO pin output to high level
1
Section 10 Serial Communication Interface
pin. When read, SOL returns the output level of
1
pin output level after transmission, a write
1
Rev. 6.00 Aug 04, 2006 page 337 of 680
(initial value)
(initial value)
REJ09B0145-0600