Table 3.5 Conditions Under Which Interrupt Request Flag Is Set To 1 - Renesas H8/3847R Series Hardware Manual

Section 3 Exception Handling
Table 3.5 Conditions Under which Interrupt Request Flag is Set to 1
Interrupt Request
Flags Set to 1
IRR1 IRRI4
IRRI3
IRRI2
IRRI1
IRRI0
IWPR IWPF7
IWPF6
IWPF5
IWPF4
IWPF3
IWPF2
IWPF1
IWPF0
Figure 3.7 shows the procedure for setting a bit in a port mode register and clearing the interrupt
request flag.
When switching a pin function, mask the interrupt before setting the bit in the port mode register.
After accessing the port mode register, execute at least one instruction (e.g., NOP), then clear the
interrupt request flag from 1 to 0. If the instruction to clear the flag is executed immediately after
the port mode register access without executing an intervening instruction, the flag will not be
cleared.
Rev. 6.00 Aug 04, 2006 page 116 of 680
REJ09B0145-0600
Conditions
When PMR1 bit IRQ4 is changed from 0 to 1 while pin IRQ
bit IEG4 = 0.
When PMR1 bit IRQ4 is changed from 1 to 0 while pin IRQ
bit IEG4 = 1.
When PMR1 bit IRQ3 is changed from 0 to 1 while pin IRQ
bit IEG3 = 0.
When PMR1 bit IRQ3 is changed from 1 to 0 while pin IRQ
bit IEG3 = 1.
When PMR1 bit IRQ2 is changed from 0 to 1 while pin IRQ
bit IEG2 = 0.
When PMR1 bit IRQ2 is changed from 1 to 0 while pin IRQ
bit IEG2 = 1.
When PMR1 bit IRQ1 is changed from 0 to 1 while pin IRQ
bit IEG1 = 0.
When PMR1 bit IRQ1 is changed from 1 to 0 while pin IRQ
bit IEG1 = 1.
When PMR3 bit IRQ0 is changed from 0 to 1 while pin IRQ
bit IEG0 = 0.
When PMR3 bit IRQ0 is changed from 1 to 0 while pin IRQ
bit IEG0 = 1.
When PMR5 bit WKP7 is changed from 0 to 1 while pin WKP
When PMR5 bit WKP6 is changed from 0 to 1 while pin WKP
When PMR5 bit WKP5 is changed from 0 to 1 while pin WKP
When PMR5 bit WKP4 is changed from 0 to 1 while pin WKP
When PMR5 bit WKP3 is changed from 0 to 1 while pin WKP
When PMR5 bit WKP2 is changed from 0 to 1 while pin WKP
When PMR5 bit WKP1 is changed from 0 to 1 while pin WKP
When PMR5 bit WKP0 is changed from 0 to 1 while pin WKP
is low and IEGR
4
is low and IEGR
4
is low and IEGR
3
is low and IEGR
3
is low and IEGR
2
is low and IEGR
2
is low and IEGR
1
is low and IEGR
1
is low and IEGR
0
is low and IEGR
0
is low.
7
is low.
6
is low.
5
is low.
4
is low.
3
is low.
2
is low.
1
is low.
0