Figure 10.6 Sci3 Block Diagram - Renesas H8/3847R Series Hardware Manual

8-bit single-chip microcomputer super low power

Table of Contents

2. Block Diagram

Figure 10.6 shows a block diagram of SCI3.

Receive shift register

Receive data register

Transmit shift register

Transmit data register

Serial mode register

Serial control register 3

Serial status register

Bit rate register

Bit rate counter

Serial port control register

Baud rate generator

Transmit/receive

control circuit

Figure 10.6 SCI3 Block Diagram

Section 10 Serial Communication Interface

Internal clock (φ/64, φ/16, φw/2, φ)

Rev. 6.00 Aug 04, 2006 page 349 of 680

Interrupt request

(TEI, TXI, RXI, ERI)

REJ09B0145-0600