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Appendix B Internal I/O Registers
IEGR—IRQ Edge Select Register
Bit
7
Initial value
0
Read/Write
IRQ
0 Falling edge of IRQ
1
IRQ
edge select
4
0 Falling edge of IRQ
1
Rising edge of IRQ
Rev. 6.00 Aug 04, 2006 page 622 of 680
REJ09B0145-0600
6
5
1
1
IRQ
1
0 Falling edge of IRQ
1
Rising edge of IRQ
IRQ
edge select
2
0 Falling edge of IRQ
1
Rising edge of IRQ
edge select
3
, TMIF pin input is detected
3
Rising edge of IRQ
, TMIF pin input is detected
3
pin and ADTRG pin is detected
4
pin and ADTRG pin is detected
4
4
3
IEG4
IEG3
0
0
R/W
R/W
IRQ
edge select
0
0 Falling edge of IRQ
1
Rising edge of IRQ
edge select
, TMIC pin input is detected
1
, TMIC pin input is detected
1
pin input is detected
2
pin input is detected
2
H'F2
System control
2
1
IEG2
IEG1
IEG0
0
0
R/W
R/W
R/W
pin input is detected
0
pin input is detected
0
0
0
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