Renesas H8/3847R Series Hardware Manual page 299

Bits 7 to 5: Clock output select (TMA7 to TMA5)
Bits 7 to 5 choose which of eight clock signals is output at the TMOW pin. The system clock
divided by 32, 16, 8, or 4 can be output in active mode and sleep mode. A 32.768 kHz or 38.4
kHz signal divided by 32, 16, 8, or 4 can be output in active mode, sleep mode, and subactive
mode. φ
is output in all modes except the reset state.
w
CWOSR TMA
Bit 7
CWOS TMA7
0 0
1
1 *
Bit 4: Reserved bit
Bit 4 is reserved; it is always read as 1, and cannot be modified.
Bit 6 Bit 5
TMA6 TMA5 Clock Output
φ/32
0 0
φ/16
1
φ/8
1 0
φ/4
1
φ
0 0
φ
1
φ
1 0
φ
1
φ
* *
/32
W
/16
W
/8
W
/4
W
W
Rev. 6.00 Aug 04, 2006 page 261 of 680
Section 9 Timers
(initial value)
*: Don't care
REJ09B0145-0600