Renesas H8/3847R Series Hardware Manual page 659

8-bit single-chip microcomputer super low power
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SYSCR2—System Control Register 2
Bit
7
Initial value
1
Read/Write
Medium speed on flag
0 Operates in active (high-speed) mode
1 Operates in active (medium-speed) mode
Direct transfer on flag
0 • When a SLEEP instruction is executed in active mode, a transition is
made to standby mode, watch mode, or sleep mode
• When a SLEEP instruction is executed in subactive mode, a transition is
made to watch mode or subsleep mode
• When a SLEEP instruction is executed in active (high-speed) mode, a direct
1
transition is made to active (medium-speed) mode if SSBY = 0, MSON = 1, and
LSON = 0, or to subactive mode if SSBY = 1, TMA3 = 1, and LSON = 1
• When a SLEEP instruction is executed in active (medium-speed) mode, a direct
transition is made to active (high-speed) mode if SSBY = 0, MSON = 0, and
LSON = 0, or to subactive mode if SSBY = 1, TMA3 = 1, and LSON = 1
• When a SLEEP instruction is executed in subactive mode, a direct
transition is made to active (high-speed) mode if SSBY = 1, TMA3 = 1, LSON = 0,
and MSON = 0, or to active (medium-speed) mode if SSBY = 1, TMA3 = 1,
LSON = 0, and MSON = 1
Noise elimination sampling frequency select
0 Sampling rate is φ
1 Sampling rate is φ
6
5
1
1
/16
OSC
/4
OSC
Appendix B Internal I/O Registers
H'F1
4
3
NESEL
DTON
MSON
1
0
R/W
R/W
R/W
Subactive mode clock select
φ /8
0
0
W
φ /4
1
W
φ /2
1
*
W
Rev. 6.00 Aug 04, 2006 page 621 of 680
System control
2
1
0
SA1
SA0
0
0
0
R/W
R/W
*: Don't care
REJ09B0145-0600

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