2. Block Diagram
Figure 9.2 shows a block diagram of timer C.
UD
φ
PSS
TMIC
φ
/4
W
Legend:
TMC
: Timer mode register C
TCC
: Timer counter C
TLC
: Timer load register C
IRRTC
: Timer C overflow interrupt request flag
PSS
: Prescaler S
3. Pin Configuration
Table 9.5 shows the timer C pin configuration.
Table 9.5
Pin Configuration
Name
Timer C event input
Timer C up/down-count selection
Figure 9.2 Block Diagram of Timer C
Abbr.
I/O
TMIC
Input
UD
Input
TMC
TCC
TLC
Function
Input pin for event input to TCC
Timer C up/down select
Rev. 6.00 Aug 04, 2006 page 267 of 680
Section 9 Timers
IRRTC
REJ09B0145-0600