Figure 1.2 Pin Arrangement (Fp-100B, Tfp-100B And Tfp-100G: Top View) - Renesas H8/3847R Series Hardware Manual

Section 1 Overview
P9 /SEG 76
1 34
P9 /SEG 77
2 35
P9 /SEG 78
3 36
P9 /SEG /M (P9 /SEG 79
*)
4 37 4 37
P9 /SEG /DO (P9 /SEG 80
*)
5 38 5 38
P9 /SEG /CL (P9 /SEG 81
*)
6 39 2 6 39
P9 /SEG /CL (P9 /SEG 82
*)
7 40 1 7 40
P4 /SCK 83
0 32
P4 /RXD 84
1 32
P4 /TXD 85
2 32
P4 /IRQ 86
3 0
AV 87
CC
PB /AN 88
0 0
PB /AN 89
1 1
PB /AN 90
2 2
PB /AN 91
3 3
PB /AN 92
4 4
PB /AN 93
5 5
PB /AN 94
6 6
PB /AN 95
7 7
PC /AN 96
0 8
PC /AN 97
1 9
PC /AN 98
2 10
PC /AN 99
3 11
AV 100
SS
Notes: When the on-chip emulator is used, pins P24, P25, P26, and P27 are reserved for use exclusively by the emulator and therefore
cannot be accessed by the user.
* H8/38347, H8/38447

Figure 1.2 Pin Arrangement (FP-100B, TFP-100B and TFP-100G: Top View)

Rev. 6.00 Aug 04, 2006 page 10 of 680
REJ09B0145-0600
50 P5 /WKP /SEG
7 7 8
49 P5 /WKP /SEG
6 6 7
48 P5 /WKP /SEG
5 5 6
47 P5 /WKP /SEG
4 4 5
46 P5 /WKP /SEG
3 3 4
45 P5 /WKP /SEG
2 2 3
44 P5 /WKP /SEG
1 1 2
43 P5 /WKP /SEG
0 0 1
42 PA /COM
0 1
41 PA /COM
1 2
40 PA /COM
2 3
39 PA /COM
3 4
38 V
CC
37 V0
36 V1
35 V2
34 V3
33 V
SS
32 CV (V in the H8/3847S)
CC CC
31 P3 /AEVL
7
30 P3 /AEVH
6
29 P3 /TXD
5 31
28 P3 /RXD
4 31
27 P3 /SCK
3 31
* )
26 P3 /RESO (P3
2 2