Figure 6.11 Erase/Erase-Verify Flowchart - Renesas H8/3847R Series Hardware Manual

Set block start address as verify address
H'FF dummy write to verify address
Increment address
No
Last address of block ?
No
All erase block erased ?

Figure 6.11 Erase/Erase-Verify Flowchart

Erase start
SWE bit ← 1
Wait 1 µs
n ← 1
Set EBR
Enable WDT
ESU bit ← 1
Wait 100 µs
E bit ← 1
Wait 10 ms
E bit ← 0
Wait 10 µs
ESU bit ← 0
Wait 10 µs
Disable WDT
EV bit ← 1
Wait 20 µs
Wait 2 µs
Read verify data
No
Verify data = all 1s ?
Yes
Yes
EV bit ← 0
Wait 4 µs
Yes
SWE bit ← 0
Wait 100 µs
End of erasing
Rev. 6.00 Aug 04, 2006 page 185 of 680
Section 6 ROM
n ← n + 1
EV bit ← 0
Wait 4µs
Yes
n ≤100 ?
No
SWE bit ← 0
Wait 100 µs
Erase failure
REJ09B0145-0600