Cpu Interface - Renesas H8/3847R Series Hardware Manual

8-bit single-chip microcomputer super low power

Table of Contents

Bit 2: Timer F module standby mode control (TFCKSTP)

Bit 2 controls setting and clearing of module standby mode for timer F.

Timer F is set to module standby mode

Timer F module standby mode is cleared

CPU Interface

TCF and OCRF are 16-bit read/write registers, but the CPU is connected to the on-chip peripheral

modules by an 8-bit data bus. When the CPU accesses these registers, it therefore uses an 8-bit

temporary register (TEMP).

In 16-bit mode, TCF read/write access and OCRF write access must be performed 16 bits at a time

(using two consecutive byte-size MOV instructions), and the upper byte must be accessed before

the lower byte. Data will not be transferred correctly if only the upper byte or only the lower byte

is accessed.

In 8-bit mode, there are no restrictions on the order of access.

Rev. 6.00 Aug 04, 2006 page 285 of 680

Section 9 Timers

(initial value)

REJ09B0145-0600