Renesas H8/38445 Manuals

Manuals and User Guides for Renesas H8/38445. We have 1 Renesas H8/38445 manual available for free PDF download: Hardware Manual

Renesas H8/38445 Hardware Manual (721 pages)

8-Bit Single-Chip Microcomputer Super Low Power

Brand: Renesas | Category: Computer Hardware | Size: 4.94 MB

Table of Contents
13
Section 1 Overview

39
- Overview
  39
- Table 1.1 Features
  40
Section 1 Overview

45
Section 2 CPU

77
- Overview
  77
  - Features
    77
  - Address Space
    78
  - Register Configuration
    79
  - Figure 2.1 CPU Registers
    79
Section 2 CPU

79
- Register Descriptions
  80
  - General Registers
    80
  - Control Registers
    80
  - Figure 2.2 Stack Pointer
    80
  - Initial Register Values
    82
- Data Formats
  82
Section 2 CPU

85
Section 3 Exception Handling

131
- Overview
  131
- Reset
  131
  - Reset Sequence
    131
  - Interrupt Immediately after Reset
    132
  - Figure 3.1 Reset Sequence
    132
Section 3 Exception Handling

132
- Interrupts
  133
  - Overview
    133
- Table 3.1 Exception Handling Types and Priorities
  
  134
- Table 3.2 Interrupt Sources and Their Priorities
  134
- Interrupt Control Registers
  135
- Table 3.3 Interrupt Control Registers
  135
- External Interrupts
  145
- Figure 3.2 Block Diagram of Interrupt Controller
  146
- Internal Interrupts
  146
- Interrupt Operations
  146
- Figure 3.3 Flow up to Interrupt Acceptance
  148
- Figure 3.4 Stack State after Completion of Interrupt Exception Handling
  149
- Figure 3.5 Interrupt Sequence
  150
- Interrupt Response Time
  151
- Table 3.4 Interrupt Wait States
  151
Section 3 Exception Handling

134
- Application Notes
  152
Section 4 Clock Pulse Generators

157
Section 4 Clock Pulse Generators

157
Section 5 Power-Down Modes

169
- Overview
  169
Section 5 Power-Down Modes

169
Section 5 Power-Down Modes

170
- Sleep Mode
  176
  - Transition to Sleep Mode
    176
  - Clearing Sleep Mode
    177
  - Clock Frequency in Sleep (Medium-Speed) Mode
    177
- Standby Mode
  178
- Watch Mode
  182
- Subsleep Mode
  183
  - Transition to Subsleep Mode
    183
  - Clearing Subsleep Mode
    183
- Subactive Mode
  184
  - Transition to Subactive Mode
    184
  - Clearing Subactive Mode
    184
  - Operating Frequency in Subactive Mode
    184
- Active (Medium-Speed) Mode
  185
- Direct Transfer
  186
- Module Standby Mode
  190
Section 6 ROM

193
- Overview
  193
  - Block Diagram
    194
  - Figure 6.1 ROM Block Diagram (H8/3844R, H8/3844S, H8/38344 and H8/38444)
    194
Section 6 ROM

194
Section 6 ROM

195
Section 7 RAM

239
Section 7 RAM

239
- Overview
  239
  - Block Diagram
    239
  - Figure 7.1 RAM Block Diagram (H8/3844R, H8/3844S, H8/38344 and H8/38444)
    239
Section 8 I/O Ports

241
Section 8 I/O Ports

241
- Overview
  241
- Table 8.1 Port Functions
  241
Section 8 I/O Ports

243
- Port 1
  243
  - Overview
    243
  - Register Configuration and Description
    243
  - Figure 8.1 Port 1 Pin Configuration
    243
  - Table 8.2 Port 1 Registers
    243
  - Pin Functions
    248
  - Table 8.3 Port 1 Pin Functions
    248
  - Pin States
    249
  - Table 8.4 Port 1 Pin States
    249
  - MOS Input Pull-Up
    250
- Port 2
  251
  - Overview
    251
  - Register Configuration and Description
    251
  - Figure 8.2 Port 2 Pin Configuration
    251
  - Table 8.5 Port 2 Registers
    251
  - Pin Function
    255
  - Table 8.6 Port 2 Pin Functions
    255
  - Pin States
    256
  - Table 8.7 Port 2 Pin States
    256
- Port 3
  257
  - Overview
    257
  - Register Configuration and Description
    257
  - Figure 8.3 Port 3 Pin Configuration
    257
  - Table 8.8 Port 3 Registers
    257
  - Pin Functions
    261
  - Table 8.9 Port 3 Pin Functions
    261
  - Pin States
    263
  - MOS Input Pull-Up
    263
  - Table 8.10 Port 3 Pin States
    263
- Port 4
  264
  - Overview
    264
  - Register Configuration and Description
    264
  - Figure 8.4 Port 4 Pin Configuration
    264
  - Table 8.11 Port 4 Registers
    264
  - Pin Functions
    266
  - Table 8.12 Port 4 Pin Functions
    266
  - Pin States
    267
  - Table 8.13 Port 4 Pin States
    267
- Port 5
  268
  - Overview
    268
  - Register Configuration and Description
    268
  - Figure 8.5 Port 5 Pin Configuration
    268
  - Table 8.14 Port 5 Registers
    268
  - Pin Functions
    270
  - Table 8.15 Port 5 Pin Functions
    270
  - Pin States
    271
  - MOS Input Pull-Up
    271
  - Table 8.16 Port 5 Pin States
    271
- Port 6
  272
  - Overview
    272
  - Register Configuration and Description
    272
  - Figure 8.6 Port 6 Pin Configuration
    272
  - Table 8.17 Port 6 Registers
    272
  - Pin Functions
    274
  - Table 8.18 Port 6 Pin Functions
    274
  - Table 8.19 Port 6 Pin States
    274
  - MOS Input Pull-Up
    275
  - Overview
    276
  - Register Configuration and Description
    276
  - Figure 8.7 Port 7 Pin Configuration
    276
  - Table 8.20 Port 7 Registers
    276
  - Pin Functions
    278
  - Pin States
    278
  - Table 8.21 Port 7 Pin Functions
    278
  - Table 8.22 Port 7 Pin States
    278
  - Overview
    279
  - Register Configuration and Description
    279
  - Figure 8.8 Port 8 Pin Configuration
    279
  - Table 8.23 Port 8 Registers
    279
  - Pin Functions
    281
  - Pin States
    281
  - Table 8.24 Port 8 Pin Functions
    281
  - Table 8.25 Port 8 Pin States
    281
8.8 Port 7

276
8.9 Port 8

279
- Port 9
  282
  - Overview
    282
  - Register Configuration and Description
    282
  - Figure 8.9 Port 9 Pin Configuration
    282
  - Table 8.26 Port 9 Registers
    282
  - Pin Functions
    284
  - Table 8.27 Port 9 Pin Functions
    284
  - Pin States
    285
  - Table 8.28 Port 9 Pin States
    285
- Port a
  286
  - Overview
    286
  - Register Configuration and Description
    286
  - Figure 8.10 Port a Pin Configuration
    286
  - Table 8.29 Port a Registers
    286
  - Pin Functions
    288
  - Pin States
    288
  - Table 8.30 Port a Pin Functions
    288
  - Table 8.31 Port a Pin States
    288
- Port B
  289
  - Overview
    289
  - Register Configuration and Description
    289
  - Figure 8.11 Port B Pin Configuration
    289
  - Table 8.32 Port B Register
    289
- Port C
  290
  - Overview
    290
  - Register Configuration and Description
    290
  - Figure 8.12 Port C Pin Configuration
    290
  - Table 8.33 Port C Register
    290
- Input/Output Data Inversion Function
  291
- Application Note
  294
  - The Management of the Un-Use Terminal
    294
Section 9 Timers

295
Section 9 Timers

295
- Overview
  295
- Table 9.1 Timer Functions
  295
- Timer a
  296
  - Overview
    296
  - Figure 9.1 Block Diagram of Timer a
    297
  - Table 9.2 Pin Configuration
    297
  - Register Descriptions
    298
  - Table 9.3 Timer a Registers
    298
  - Timer Operation
    302
  - Timer a Operation States
    303
  - Application Note
    303
  - Table 9.4 Timer a Operation States
    303
Section 9 Timers

297
Section 10 Serial Communication Interface

369
Section 10 Serial Communication Interface

369
- Overview
  369
- Table 10.1 Overview of SCI Functions
  369
- Sci1
  370
  - Overview
    370
  - Figure 10.1 SCI1 Block Diagram
    371
  - Register Descriptions
    372
  - Table 10.2 SCI1 Pin Configuration
    372
  - Table 10.3 Registers
    372
  - Operation
    378
  - Figure 10.2 Transfer Format
    378
  - Operation in SSB Mode
    381
  - Figure 10.3 Example of SSB Connections
    381
  - Figure 10.4 Transfer Format (When SNC1 = 0, SNC0 = 1, MRKON = 1)
    382
  - Figure 10.5 HOLD TAIL and LATCH TAIL Output Waveforms
    382
  - Interrupt Source
    384
  - Application Notes
    384
Section 10 Serial Communication Interface

371
- Sci3
  385
Section 11 14-Bit PWM

447
- Overview
  447
  - Features
    447
Section 11 14-Bit PWM

448
- Block Diagram
  448
- Pin Configuration
  448
- Figure 11.1 Block Diagram of the 14 Bit PWM
  448
- Table 11.1 Pin Configuration
  448
- Register Configuration
  449
Section 11 14-Bit PWM

448
- Register Descriptions
  449
- Operation
  453
  - PWM Operation Modes
    454
  - Figure 11.2 PWM Output Waveform
    454
  - Table 11.3 PWM Operation Modes
    454
Section 12 A/D Converter

455
- Overview
  455
  - Features
    455
  - Block Diagram
    456
  - Figure 12.1 Block Diagram of the A/D Converter
    456
  - Pin Configuration
    457
  - Register Configuration
    457
  - Table 12.1 Pin Configuration
    457
  - Table 12.2 Register Configuration
    457
Section 12 A/D Converter

456
Section 12 A/D Converter

457
Section 13 LCD Controller/Driver

469
- Overview
  469
  - Features
    469
  - Block Diagram
    470
  - Figure 13.1 Block Diagram of LCD Controller/Driver
    470
  - Pin Configuration
    471
  - Register Configuration
    471
  - Table 13.1 Pin Configuration
    471
  - Table 13.2 LCD Controller/Driver Registers
    471
Section 13 LCD Controller/Driver

470
Section 13 LCD Controller/Driver

471
- Register Descriptions
  472
- Operation
  479
Section 14 Power Supply Circuit

499
Section 14 Power Supply Circuit

499
Section 15 Electrical Characteristics

501
Section 15 Electrical Characteristics

501
Section 15 Electrical Characteristics

573
- Operation Timing
  573
- Figure 15.1 Clock Input Timing
  573
- Figure 15.2 RES Low Width
  573
- Figure 15.3 Input Timing
  573
- Figure 15.4 UD Pin Minimum Modulation Width Timing
  574
- Figure 15.5 SCI1 Input/Output Timing
  574
- Figure 15.6 SCK3 Input Clock Timing
  575
- Figure 15.7 SCI3 Synchronous Mode Input/Output Timing
  575
- Figure 15.8 Segment Expansion Signal Timing
  576
- Output Load Circuit
  577
- Figure 15.9 Output Load Condition
  577
- Resonator
  578
- Figure 15.10 Resonator Equivalent Circuit
  578
- Figure 15.11 Recommended Resonators
  578
- Usage Note
  579
Appendix A CPU Instruction Set

581
- Instructions
  581
- Operation Code Map
  589
- Number of Execution States
  591
Appendix B Internal I/O Registers

598
- Addresses
  598
- Functions
  602
Appendix C I/O Port Block Diagrams

668
Appendix F Package Dimensions

706
Appendix G Specifications of Chip Form

710
Appendix H Form of Bonding Pads

712
Appendix I Specifications of Chip Tray

715

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Renesas H8/38445 Manuals

Renesas H8/38445 Hardware Manual (721 pages)

Table of Contents

Section 1 Overview

Section 1 Overview

Section 2 CPU

Section 2 CPU

Section 2 CPU

Section 3 Exception Handling

Section 3 Exception Handling

Table 3.1 Exception Handling Types and Priorities

Section 3 Exception Handling

Section 4 Clock Pulse Generators

Section 4 Clock Pulse Generators

Section 5 Power-Down Modes

Section 5 Power-Down Modes

Section 5 Power-Down Modes

Section 6 ROM

Section 6 ROM

Section 6 ROM

Section 7 RAM

Section 7 RAM

Section 8 I/O Ports

Section 8 I/O Ports

Section 8 I/O Ports

8.8 Port 7

8.9 Port 8

Section 9 Timers

Section 9 Timers

Section 9 Timers

Section 10 Serial Communication Interface

Section 10 Serial Communication Interface

Section 10 Serial Communication Interface

Section 11 14-Bit PWM

Section 11 14-Bit PWM

Section 11 14-Bit PWM

Section 12 A/D Converter

Section 12 A/D Converter

Section 12 A/D Converter

Section 13 LCD Controller/Driver

Section 13 LCD Controller/Driver

Section 13 LCD Controller/Driver

Section 14 Power Supply Circuit

Section 14 Power Supply Circuit

Section 15 Electrical Characteristics

Section 15 Electrical Characteristics

Section 15 Electrical Characteristics

Appendix A CPU Instruction Set

Appendix B Internal I/O Registers

Appendix C I/O Port Block Diagrams

Appendix F Package Dimensions

Appendix G Specifications of Chip Form

Appendix H Form of Bonding Pads

Appendix I Specifications of Chip Tray

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