Renesas H8/3847R Series Hardware Manual page 545

Item Symbol Pins
UD pin minimum t
UDH
modulation width t
UDL
Notes: 1. Selected with SA1 and SA0 of system clock control register 2 (SYSCR2).
2. Figures in parentheses are the maximum t
Values
Applicable
Min Typ
UD 4 —
Section 15 Electrical Characteristics
Max Unit Test Condition
— t
cyc
t
subcyc
rate with external clock input.
OSC
Rev. 6.00 Aug 04, 2006 page 507 of 680
Reference
Figure
Figure 15.4
REJ09B0145-0600