Renesas H8/3847R Series Hardware Manual page 617

SCR1—Serial Control Register 1
Bit 7
SNC1
Initial value 0
Read/Write R/W
6 5
SNC0 MRKON
0 0
R/W R/W
Clock select 2 to 0
Clock source select
0 Clock source is prescaler S, SCK
1 Clock source is external clock, SCK
LATCH TAIL select
0 HOLD TAIL is output
1 LATCH TAIL is output
Tail mark control
0 Tail mark is not output (synchronous mode)
1 Tail mark is output (SSB mode)
Operating mode select
0 0 8-bit synchronous mode
1 16-bit synchronous mode
1 0 Continuous clock output mode
1 Reserved
Appendix B Internal I/O Registers
4 3
LTCH CKS3
0 0
R/W R/W
Bit 2 Bit 1 Bit 0
CKS2 CKS1 CKS0
0 0 0
0 0 1
0 1 0
1 1
0
1 0 0
1 0 1
1
1 0
1 1
1
Rev. 6.00 Aug 04, 2006 page 579 of 680
H'A0
2 1
CKS2 CKS1 CKS0
0 0
R/W R/W R/W
Serial Clock Cycle
Prescaler
Clock Cycle
Division
φ = 2.5 MHz
Ratio
φ/1024
409.6 µs
φ/256
102.4 µs
φ/64
25.6 µs
φ/32
12.8 µs
φ/16
6.4 µs
φ/8
3.2 µs
φ/4
1.6 µs
φ
/4 122 µs
W
is output pin
1
is input pin
1
REJ09B0145-0600
SCI1
0
0