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• In active mode or sleep mode, analog power supply current (AI
resistance even when the A/D converter is not operating. Therefore, if the A/D converter is not
used, it is recommended that AV
ADCKSTP (A/D converter module standby mode control) bit be cleared to 0 in clock stop
register 1 (CKSTPR1).
12.6.2
Permissible Signal Source Impedance
This LSI's analog input is designed such that conversion precision is guaranteed for an input
signal for which the signal source impedance is 10 kΩ or less. This specification is provided to
enable the A/D converter's sample-and-hold circuit input capacitance to be charged within the
sampling time; if the sensor output impedance exceeds 10 kΩ, charging may be insufficient and it
may not be possible to guarantee A/D conversion precision. However, a large capacitance
provided externally, the input load will essentially comprise only the internal input resistance of
10 kΩ, and the signal source impedance is ignored. However, as a low-pass filter effect is obtained
in this case, it may not be possible to follow an analog signal with a large differential coefficient
(e.g., 5 mV/µs or greater) (see figure 12.6). When converting a high-speed analog signal, a low-
impedance buffer should be inserted.
12.6.3
Influences on Absolute Precision
Adding capacitance results in coupling with GND, and therefore noise in GND may adversely
affect absolute precision. Be sure to make the connection to an electrically stable GND.
Care is also required to ensure that filter circuits do not interfere with digital signals or act as
antennas on the mounting board.
Sensor input
be connected to the system power supply and the
CC
Sensor output
impedance
Up to 10 kΩ
Low-pass
filter
C to 0.1 µF
Figure 12.6 Analog Input Circuit Example
STOP1
This LSI
A/D converter
equivalent circuit
10 kΩ
C
=
in
15 pF
Rev. 6.00 Aug 04, 2006 page 429 of 680
Section 12 A/D Converter
) flows into the ladder
20 pF
REJ09B0145-0600
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