Power-Down States For Flash Memory; Table 6.24 Flash Memory Operating States - Renesas H8/3847R Series Hardware Manual

8-bit single-chip microcomputer super low power

Table of Contents

Section 6 ROM

Power-Down States for Flash Memory

In user mode, the flash memory will operate in either of the following states:

• Normal operating mode

The flash memory can be read and written to at high speed.

• Power-down operating mode

The power supply circuit of the flash memory is partly halted and can be read under low power

consumption.

• Standby mode

All flash memory circuits are halted.

Table 6.24 shows the correspondence between the operating modes of this LSI and the flash

memory. In subactive mode, the flash memory can be set to operate in power-down mode with the

PDWND bit in FLPWCR. When the flash memory returns to its normal operating state from

power-down mode or standby mode, a period to stabilize the power supply circuits that were

stopped is needed. When the flash memory returns to its normal operating state, bits STS2 to STS0

in SYSCR1 must be set to provide a wait time of at least 20 µs, even when the external clock is

LSI Operating State

Subactive mode

Subsleep mode

Standby mode

Rev. 6.00 Aug 04, 2006 page 200 of 680

REJ09B0145-0600

Flash Memory Operating State

PDWND = 0 (Initial value)

Normal operating mode

Power-down mode

Normal operating mode

Standby mode

Normal operating mode

Standby mode