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Appendix B Internal I/O Registers
CKSTPR1—Clock Stop Register 1
Bit
7
S1CKSTP
Initial value
1
Read/Write
R/W
SCI3-1 module standby mode control
0 SCI3-1 is set to module standby mode
1
SCI1 module standby mode control
0 SCI1 is set to module standby mode
1
SCI1 module standby mode is cleared
Rev. 6.00 Aug 04, 2006 page 628 of 680
REJ09B0145-0600
6
5
S31CKSTP
S32CKSTP
1
1
R/W
R/W
Timer G interrupt enable
0 Timer G is set to module standby mode
1
A/D converter module standby mode control
0 A/D converter is set to module standby mode
1
A/D converter module standby mode is cleared
SCI3-2 module standby mode control
0 SCI3-2 is set to module standby mode
1
SCI3-2 module standby mode is cleared
SCI3-1 module standby mode is cleared
4
3
ADCKSTP
TGCKSTP
1
1
R/W
R/W
Timer A module standby mode control
0 Timer A is set to module standby mode
1
Timer A module standby mode is cleared
Timer C module standby mode control
0 Timer C is set to module standby mode
1
Timer C module standby mode is cleared
Timer F module standby mode control
0 Timer F is set to module standby mode
1
Timer F module standby mode is cleared
Timer G module standby mode is cleared
H'FA
System control
2
1
TFCKSTP
TCCKSTP
TACKSTP
1
1
R/W
R/W
0
1
R/W
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