Renesas H8/3847R Series Hardware Manual page 126

Section 2 CPU
[B: BSET instruction executed]
BSET #0 ,
[C: After executing BSET]
MOV. B @RAM0,
MOV. B R0L,
P3
7
Input/output Input
Pin state Low
level
PCR3 0
PDR3 1
RAM0 1
2. Bit Manipulation in a Register Containing a Write-only Bit
Example 3: BCLR instruction executed designating port 3 control register PCR3
As in the examples above, P3
high-level signal at P3
signals. In this example, the BCLR instruction is used to change pin P3
assumed that a high-level signal will be input to this input pin.
[A: Prior to executing BCLR]
P3
7
Input/output Input
Pin state Low
level
PCR3 0
PDR3 1
Rev. 6.00 Aug 04, 2006 page 88 of 680
REJ09B0145-0600
The BSET instruction is executed designating the PDR3
@RAM0
work area (RAM0).
The work area (RAM0) value is written to PDR3.
R0L
@PDR3
P3 P3
6 5
Input Output
High Low
level level
0 1
0 0
0 0
and P3 are input pins, with a low-level signal input at P3
7 6
. The remaining pins, P3
6
P3 P3
6 5
Input Output
High Low
level level
0 1
0 0
P3 P3 P3
4 3
Output Output Output
Low Low Low
level level level
1 1 1
0 0 0
0 0 0
to P3 , are output pins that output low-level
5 0
P3 P3 P3
4 3
Output Output Output
Low Low Low
level level level
1 1 1
0 0 0
P3 P3
2 1 0
Output Output
Low High
level level
1 1
0 1
0 1
and a
7
to an input port. It is
0
P3 P3
2 1 0
Output Output
Low Low
level level
1 1
0 0