Section 4 Clock Pulse Generators; Overview; Block Diagram; System Clock And Subclock - Renesas H8/3847R Series Hardware Manual

4.1

Overview

Clock oscillator circuitry (CPG: clock pulse generator) is provided on-chip, including both a
system clock pulse generator and a subclock pulse generator. The system clock pulse generator
consists of a system clock oscillator and system clock dividers. The subclock pulse generator
consists of a subclock oscillator circuit and a subclock divider.
4.1.1

Block Diagram

Figure 4.1 shows a block diagram of the clock pulse generators.
OSC
System clock
1
oscillator
OSC
2
System clock pulse generator
EXCL*
Subclock
X
1
oscillator
X
2
Subclock pulse generator
Note: * H8/38347 Group and H8/38447 Group only.

Figure 4.1 Block Diagram of Clock Pulse Generators

4.1.2

System Clock and Subclock

The basic clock signals that drive the CPU and on-chip peripheral modules are φ and φ
of the clock signals have names: φ is the system clock, φ
clock, and φ
is the watch clock.
W
The clock signals available for use by peripheral modules are φ/2, φ/4, φ/8, φ/16, φ/32, φ/64,
φ/128, φ/256, φ/512, φ/1024, φ/2048, φ/4096, φ/8192, φ
and φ
/128. The clock requirements differ from one module to another.
W

Section 4 Clock Pulse Generators

φ
OSC
System clock
divider (1/2)
(f )
OSC
φ
Subclock
W
divider
(f )
(1/2, 1/4, 1/8)
W
Section 4 Clock Pulse Generators
φ
/2
OSC
φ
/128
OSC
φ
/64
System
OSC
φ
clock
/32
OSC
divider
φ
/16
OSC
φ /2
W
φ /4
W
φ /8
W
is the subclock, φ
SUB
, φ /2, φ
W W W
Rev. 6.00 Aug 04, 2006 page 119 of 680
φ
Prescaler S
(13 bits)
φ
SUB
Prescaler W
(5 bits)
SUB
is the oscillator
OSC
/4, φ /8, φ /16, φ /32, φ
W W W
REJ09B0145-0600
φ/2
to
φ/8192
φ
W
φ /2
W
φ /4
W
φ /8
W
to
φ /128
W
. Four
/64,
W