Register Configuration; Table 6.6 Register Configuration - Renesas H8/3847R Series Hardware Manual

8-bit single-chip microcomputer super low power

Table of Contents

Section 6 ROM

Register Configuration

Table 6.6 lists the register configuration to control the flash memory when the built in flash

memory is effective.

Flash memory control register 1

Flash memory control register 2

Flash memory power control register

Erase block register

Flash memory enable register

Note: FLMCR1, FLMCR2, FLPWCR, EBR, and FENR are 8 bit registers. Only byte access is

enabled which are two-state access. These registers are dedicated to the product in which

flash memory is included. The product in which PROM or ROM is included does not have

these registers. When the corresponding address is read in these products, the value is

undefined. A write is disabled.

Rev. 6.00 Aug 04, 2006 page 170 of 680

REJ09B0145-0600

Abbreviation

Initial Value