Low-Power-Consumption Lcd Drive System - Renesas H8/3847R Series Hardware Manual

13.3.4

Low-Power-Consumption LCD Drive System

The use of the built-in split-resistance is normally the easiest method for implementing the LCD
power supply circuit, but since the built-in resistance is fixed, a certain direct current flows
constantly from the built-in resistance's V
current dissipation of the LCD panel, if an LCD panel with a small current dissipation is used, a
wasteful amount of power will be consumed. The H8/3847R Group is equipped with a function to
minimize this waste of power. Use of this function makes it possible to achieve the optimum
power supply circuit for the LCD panel's current dissipation.
1. Principles
1. Capacitors are connected as external circuits to LCD power supply pins V1, V2, and V3, as
shown in figure 13.14.
2. The capacitors connected to V1, V2, and V3 are repeatedly charged and discharged in the
cycle shown in figure 13.14, maintaining the potentials.
3. At this time, the charged potential is a potential corresponding to the V1, V2, and V3 pins,
respectively. (For example, with 1/3 bias drive, the charge for V2 is 2/3 that of V1, and that
for V3 is 1/3 that of V1.)
4. Power is supplied to the LCD panel by means of the charges accumulated in these
capacitors.
5. The capacitances and charging/discharging periods of these capacitors are therefore
determined by the current dissipation of the LCD panel.
6. The charging and discharging periods can be selected by software.
2. Example of operation (with 1/3 bias drive)
1. During charging period Tc in the figure, the potential is divided among pins V1, V2, and
V3 by the built-in split-resistance (the potential of V2 being 2/3 that of V1, and that of V3
being 1/3 that of V1), as shown in figure 13.14, and external capacitors C1, C2, and C3 are
charged. The LCD panel is continues to be driven during this time.
2. In the following discharging period, Tdc, charging is halted and the charge accumulated in
each capacitor is discharged, driving the LCD panel.
3. At this time, a slight voltage drop occurs due to the discharging; optimum values must be
selected for the charging period and the capacitor capacitances to ensure that this does not
affect the driving of the LCD panel.
4. In this way, the capacitors connected to V1, V2, and V3 are repeatedly charged and
discharged in the cycle shown in figure 13.14, maintaining the potentials and continuously
driving the LCD panel.
to V . As this current does not depend on the
CC SS
Rev. 6.00 Aug 04, 2006 page 453 of 680
Section 13 LCD Controller/Driver
REJ09B0145-0600