Figure 15.6 Sck3 Input Clock Timing; Figure 15.7 Sci3 Synchronous Mode Input/Output Timing - Renesas H8/3847R Series Hardware Manual

SCK
31
SCK
32
*
SCK V or V
IH OH
31
SCK
V or V
*
32 IL OL
t
TXD
TXD
31
TXD
32
(transmit data)
RXD
31
RXD
32
(receive data)
Note: * Output timing reference levels
Output high
Output low
Load conditions are shown in figure 15.9.

Figure 15.7 SCI3 Synchronous Mode Input/Output Timing

t
SCKW

Figure 15.6 SCK3 Input Clock Timing

t
scyc
*
V
OH
*
V
OL
V = 1/2 V + 0.2 V
OH CC
V = 0.8 V
OL
Section 15 Electrical Characteristics
t
scyc
t
RXS
t
RXH
Rev. 6.00 Aug 04, 2006 page 537 of 680
REJ09B0145-0600