Figure 9.8 Block Diagram Of Timer G - Renesas H8/3847R Series Hardware Manual

8-bit single-chip microcomputer super low power
Table of Contents

Advertisement

• Use of module standby mode enables this module to be placed in standby mode independently
when not used.
2. Block Diagram
Figure 9.8 shows a block diagram of timer G.
φ
φw/4
Noise
TMIG
canceler
NCS
Legend:
TMG
: Timer mode register G
TCG
: Timer counter G
ICRGF
: Input capture register GF
ICRGR
: Input capture register GR
IRRTG
: Timer G interrupt request flag
NCS
: Noise canceler select
PSS
: Prescaler S
PSS
Edge
detector

Figure 9.8 Block Diagram of Timer G

TMG
Level
detector
ICRGF
TCG
ICRGR
Rev. 6.00 Aug 04, 2006 page 295 of 680
Section 9 Timers
IRRTG
REJ09B0145-0600

Advertisement

Table of Contents
loading

Table of Contents